(ABV) Assertion-Based Verification
The design effort for complex ASICs has been able to scale linearly by increasing design reuse and adopting a well-architected, platform-based design structure. Unfortunately, functional verification has not benefited directly from this approach. One way to address increased design complexity is to supplement traditional functional verification methods with assertion-based verification (ABV). Today, assertion-based verification (ABV) has been successfully applied at multiple levels of design and verification abstraction—ranging from high-level assertions within transaction-level testbenches down to implementation-level assertions synthesized into emulation and hardware.
With the advent of standardized assertion languages and assertion libraries, the industry has recently witnessed an increased interest in adopting assertion-based techniques. As we help project teams deploy assertion-based verification (ABV), we have observed a number of myths, misunderstandings, and costly mistakes. This Verification Academy module directly addresses these issues by introducing a set of steps for advancing an organization’s assertion-based-verification (ABV) skills, infrastructure, and metrics for measuring success while identifying process areas requiring improvement. Simulation-based assertion-based verification (ABV) methods are used throughout the methodology we introduce. In addition, formal-based assertion-based verification (ABV) techniques are also highlighted for selected verification hotspots. We provide guidelines for balancing the use of formal and simulation with project constraints, such as: available resources, the skill level of the team, design and verification complexity, and schedule limitations.
This Verification Academy module is intended to be highly interactive—allowing the attendee to ask detailed questions concerning developing a successful assertion-based verification (ABV) methodology.
The target audiences include:
- Crawl - content is technical, but at an introductory level, and of interest to novice engineers.
- Walk - content is of general interest, particularly to managers, but also engineers.
- Run - content is technical in nature, and of interest to engineers.
- Overview and Welcome
- Introduction to Assertion-Based Verification
- Maturing Your Organizations ABV Capabilities
- Assertion Languages and Libraries
- Introduction to SystemVerilog Assertions (SVA)
- Introduction to Open Verification Library (OVL)
- Assertion Patterns
- Cookbook Examples
- Planning For Formal ABV Success
- Questa Simulation ABV Demo
- Questa Formal Verification Demo
This session covers what the user may expect after completing the Assertion-Based Verification module and does not require a login to view.
This session will include a survey of today’s productivity challenges, and the role Assertion-Based Verification (ABV) plays in improving productivity.
This session will introduce a framework for advancing an organization’s verification process capabilities, with an emphasis on Assertion-Based Verification processes.
This session will include a discussion on the strengths and weakness of assertion languages versus libraries related to the various stakeholders involved in the verification process.
This is an optional SystemVerilog Assertion session that is targeted at the novice who has no exposure to assertion languages, or as an assertion refresher session for the experience engineer. This optional session is focused more on the details of the various assertion standards, versus their application.
The Introduction to Open Verification Library session is optional and is targeted at the novice who has no exposure to assertion libraries, or as an assertion refresher session for the experience engineer. This optional session is focused more on the details of the various assertion standards, versus their application.
This session will discuss how to mature your organization's assertion skill through the use of assertion patterns.
This session will discuss how to mature your organization’s assertion skill through the use of complete cookbook examples.
This session will discuss how to successfully plan and integrate formal verification into your Assertion-Based Verification flow.
This session will demonstrate how assertions can be used in simulation.
This session will demonstrate how assertions can be used in formal verification.