Is there any way, we can dump the System Verilog class variables in wlf(waveform) file? I am using Questa sim 6.6b but if other version of Questa sim support the feature then I can migrate to that version. No issues.
Note: log -r * for wlf and $dumpvars with 0 for vcd can dump only interface signals and not the class variables.
Looking for the solution irrespective of Methodology. I mean, it should also work for only system verilog based test bench.
It will be very helpful in debugging the test result for the cases where simulation time is larger such as working on some video interface standard. For such cases, waiting for 3-4 hours and finding that we need another display message to print another variales is not effective way of debugging.
Thanks in Advance!! :-)
- Miheer
I think that it is possible just now with Questa10.1 !
crdly
jamal
VCD only supports "Verilog" data types or SV types that can be easily mapped to an existing Verilog type(e.g. int -> integer). That will probably never be enhanced.
Questa 6.6 and later can log class variables, but not using a wildcard. You need to explicitly name the class variable that contains a reference to the object you want to view. If you can switch to 10.1 please do that because it has a much better class object naming scheme, plus you can browse all of the currently active objects of a particular class type.
Dave Rich
Mentor Graphics
http://go.mentor.com/drich