Browse all content in Verification Academy: Sessions, Articles, Tracks, Cookbooks, and Resources

May 2024

• Questa RDC Assist – Improving Designer Productivity and Enabling Faster RDC Verification Closure with Machine Learning

  Reset-Domain Crossing May 22, 2024 Farhad Ahmed Webinar

April 2024

• Win the Tick to Trade Race by Root Causing Bugs Faster with QuestaSim

  Debug Apr 16, 2024 Rich Edelman pdf

• Win the Tick to Trade Race by Root Causing Bugs Faster with QuestaSim

  Debug Apr 16, 2024 Rich Edelman Webinar

• Lost in Code: Using Visualizer to Understand Someone’s UVM Testbench

  Debug Apr 04, 2024 Salil Pandit, Robert Rice - Siemens Eda Seminar

• Lost in Code: Using Visualizer to Understand Someone’s UVM Testbench

  Debug Apr 04, 2024 Salil Pandit, Robert Rice - Siemens Eda pdf

• Why and How We Migrated from In-house Regression Management and Coverage flow to Verification IQ

  Verification IQ Apr 04, 2024 Avinash Agrawal - Siemens Eda Seminar

• Why and How We Migrated from In-house Regression Management and Coverage flow to Verification IQ

  Verification IQ Apr 04, 2024 Avinash Agrawal - Siemens Eda pdf

• How and Why We Adopted Questa Core in the Development of Quantum Computers

  Machine Learning Apr 04, 2024 Jan Marjanovic - Atom Computing Seminar

• How and Why We Adopted Questa Core in the Development of Quantum Computers

  Machine Learning Apr 04, 2024 Jan Marjanovic - Atom Computing pdf

• How We Use PCIe Verification IP Across Multiple Projects

  Verification IP Apr 04, 2024 Weiping Guo - Marvell Seminar

• How We Use PCIe Verification IP Across Multiple Projects

  Verification IP Apr 04, 2024 Weiping Guo - Marvell pdf

• Customer Case Studies with AI/ML in Verification

  Machine Learning Apr 04, 2024 Karim Ameziane - Siemens Eda Seminar

• Customer Case Studies with AI/ML in Verification

  Machine Learning Apr 04, 2024 Karim Ameziane - Siemens Eda pdf

• The Importance of Simulation in the Pursuit of Absolute Speed!

  Simulation Apr 02, 2024 Sunil Sahoo link

March 2024

• Reduce Gate-level Simulation Bring-up Time with Semi-formal X Verification

  Verification IP Mar 27, 2024 Rick Koster pdf

• Reduce Gate-level Simulation Bring-up Time with Semi-formal X Verification

  Verification IP Mar 27, 2024 Rick Koster Webinar

• In Memoriam: Chris Spear

  SystemVerilog Mar 14, 2024 Tom Fitzpatrick link

• New Advanced Techniques for Reset Domain Crossing (RDC) Analysis

  Questa Design Solutions Mar 14, 2024 Atul Sharma pdf

• New Advanced Techniques for Reset Domain Crossing (RDC) Analysis

  Questa Design Solutions Mar 14, 2024 Atul Sharma Webinar

• Get your free copy of the IEEE 1800-2023 SystemVerilog LRM

  SystemVerilog Mar 04, 2024 Dave Rich link

• Enhancing PCIe Verification: How to Step Off the Map

  Verification IP Mar 01, 2024 Irivinti Shiva Teja - Siemens Eda Article

• Tool Assisted Debug in Visualizer

  Debug Mar 01, 2024 Richa Jha - Siemens Eda Article

• Formal Verification: An Introduction and Exploration of Challenges

  Formal Verification Mar 01, 2024 Yusuf Eren - Ankasys Article

• Maximize Returns on Your Hardware Emulation Investment with the Veloce Enterprise (ES) App

  Acceleration Mar 01, 2024 Chuck Banken, Chenguang Li - Siemens Eda Article

• A True Native 64-bit Vedic Multiplier Boosts Performance for Processors, Multi-Cores and DSP

  Machine Learning Mar 01, 2024 Lakshya Miglani, Priyanka Gharat, Gopi Srinivas Deepala - Silicon Interfaces mp4